VLSI FAQ'S

Digital Design

What is difference between software programming and HDL'S?

Difference between Latch and FF?

Is Latch-based or FF-based designs are faster and why?

Difference between Melay and Moore's state machine?

Give an example for defining clock uncertainty and clock jitter?

Give an example for one-hot-binary Greek code encoding methods?

Define a two dimentional array of size 16x32 qand assign 1'b0 to 4th location 10th bit?

What is LFSR? Discuss LFSR using primitive polynomial?

Design flip-flop , latch using transmission gates?

How to calculate depth of FIFO in a given system?

How do you represent 0.123 in binary?

HDL'S

VHDL Stands for?

What is difference between software programming and HDL'S?

Write verilog code for bidirectional and tristate buffers?

Write flow chart for multiplication using booths algorithm?

Difference between event-based simulator and cycle accurate simulator?

Discuss difference between ripple carry adder & carry-look-ahead adder?

What is self verified test bench ? Give Example?

Difference between blocking and non-blocking statement in verilog?

Difference $monitor and $display?

What is an assertion?Give an example in verilog?

Define asertion in VHDL?

What is importance of synthesis pargams?

What is parameterisable code? Give example?

What is parallel and full case?

ASIC

Difference between paralleled and pipe-lining?

What is resource sharing in Synthesis process?

What is SOC?

Why delays are not synthesisable?

SDC stands for?

Difference between simulation and Emulation?

Difference between simulation and formal verification techniques?

What is technology mapping during synthesis process?

What is CTC?

What is look-up-latch?

What is PVT?

What is antenna effect?

What is difference between LEF and DEF?

What is technology mappingfsafsdffsd during synthesis process?

What is photo-lithography?

What is floor-planning?

What is yeild ? How to calculate?

What is TLM(Transactional level module)?Where it is used?

STA

What is False Path? Give an example?

what is Multi cycle path? Give example in SDC?

Give the Equation for calculating "maximum" operating frequency?

What is clock skew?How to reduce clock skew?What is clock skew?How to reduce clock skew?

What is Slack?How to calculate?

How to improve slack?

Verification

What are different formal verification techniques?

What is test point? Where to insert it?

What is fault simulation?

Give an example for stuck-at-fault and transition fault?

How a scan-test pattern look like ?Discuss it?

What is phase shifter?

Difference between LFSR and decompresor?

What are the advantages of LFSR?

Difference between Launch-off-shift and Launch-on-shift?

What is fault aliasing?

What is IDDQ Current?

What is MSI?How to calculate signature?

CMOS

What are the advantages of CMOS technology?

What is Latchup problem in CMOS gates?

Give an example for parasitic's in CMOS?

What is parasitic in ICDC?

Draw layout for 2-input-nand gate?

Draw stick diagram for 2-input NAND gate?

Represent XOR using CMOS gate?

Please Comment if any thing goes wrong or for any other issues related to subject

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